Sunday, January 16, 2011

EC2039 PARALLEL AND DISTRIBUTED PROCESSING

Need and definition of parallel processing, shared memory multiprocessing, Distributed
memory, using parallelism, tools and languages, Parallelism in sequential machines,
Multiprocessor architecture, Pipelining, Array processors.
UNIT II SHARED MEMORY PROGRAMMING AND THREAD BASED
IMPLEMENTATION 9
Shared Memory Programming and its general model, Process model under UNIX,
Thread management, Example with threads, Attributes of Threads, Mutual Exclusion
with threads and Thread implementation..
UNIT III DISTRIBUTED COMPUTING – MESSAGE PASSING AND RPC MODEL 9
Message-passing model, General model, programming model, PVM, Remote procedure
calls (RPC), Parameter passing, JAVA Remote Method Invocation, Distributed
computing environment(DCE), Developing Applications in DCE.
UNIT IV DEBUGGING PARALLEL PROGRAMS AND OTHER PARALLELISM
PARADIGMS 9
Debugging Techniques, Debugging Message passing parallel programs and shared
memory parallel programs, Dataflow computing, systolic architectures, functional and
logic paradigms, distributed shared memory.
UNIT V DISTRIBUTED DATABASES AND DISTRIBUTED OPERATING
SYSTEMS 9
Reasons for and objectives of distributed databases, issues and systems, distribution
options, concurrency control, DDBMS structure. Need for Distributed operating systems,
network operating systems, distributed OS, Goals of DOS and Design issues.
TOTAL= 45 PERIODS
TEXT BOOKS
1. M.Sasikumar, D.Shikhare and P. Ravi Prakash, “Introduction to Parallel processing”.
PHI 2006.
2. V. Rajaraman, C. Siva Ram Murthy, “Parallel computers: Architecture and
programming”, PHI 2006.

REFERENCES
1. Harry F. Jordan, Gita Alaghband, “Fundamentals of parallel processing”, PHI 2006.
2. Quinn, M.J., “Designing Efficient Algorithms for Parallel Computers”, McGraw
-Hill, 1995.
3. Culler, D.E., “Parallel Computer Architecture”, A Hardware – Software approach,
Harcourt Asia Pte. Ltd., 1999

EC2039 PARALLEL AND DISTRIBUTED PROCESSING L T P C
3 0 0 3
UNIT I INTRODUCTION TO PARALLEL PROCESSING AND PARALLEL
ARCHITECTURES 9

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